Sciweavers

13 search results - page 2 / 3
» Multiple-process behavioral synthesis for mixed hardware-sof...
Sort
View
CODES
2009
IEEE
15 years 4 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu
DAC
1994
ACM
15 years 1 months ago
Software Scheduling in the Co-Synthesis of Reactive Real-Time Systems
Existing software scheduling techniques limit the functions that can be implemented in software to those with a restricted class of timing constraints, in particular those with a c...
Pai H. Chou, Gaetano Borriello
GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
15 years 2 months ago
Mixing ATPG and property checking for testing HW/SW interfaces
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
Alessandro Fin, Franco Fummi, Graziano Pravadelli
86
Voted
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
15 years 1 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...
86
Voted
CODES
2001
IEEE
15 years 1 months ago
Embedded UML: a merger of real-time UML and co-design
In this paper, we present a proposal for a UML profile called `Embedded UML'. Embedded UML represents a synthesis of various ideas in the real-time UML community, and concept...
Grant Martin, Luciano Lavagno, Jean Louis-Guerin