1740 search results - page 101 / 348 » Multiprocessor performance estimation using hybrid simulatio... |
144
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CODES
2007
IEEE
15 years 11 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
146
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HPCA
2000
IEEE
15 years 9 months ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
145
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ICCAD
2009
IEEE
15 years 2 months ago
2009
IEEE
Performance models for Network-on-Chip (NoC) are essential for design, optimization and Quality of Service (QoS) assurance. Classical queueing theory has been often used to provid...
131
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ISCA
2007
IEEE
15 years 10 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
157
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TROB
2008
15 years 4 months ago
2008
Control of mobile networks raises fundamental and novel problems in controlling the structure of the resulting dynamic graphs. In particular, in applications involving mobile senso...