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ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
15 years 6 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
EDBT
2010
ACM
392views Database» more  EDBT 2010»
15 years 8 months ago
Position list word aligned hybrid: optimizing space and performance for compressed bitmaps
Compressed bitmap indexes are increasingly used for efficiently querying very large and complex databases. The Word Aligned Hybrid (WAH) bitmap compression scheme is commonly rec...
François Deliège, Torben Bach Peders...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
15 years 1 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
CODES
2009
IEEE
15 years 8 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
CATA
2007
15 years 3 months ago
Simulated Evolution based Hybrids for Genetic Algorithm and Tabu Search
In this paper, Simulated Evolution based goodness attributes are incorporated into Tabu Search and Genetic Algorithms to enhance performance as compared to canonical strategies. I...
Sadiq M. Sait, Mohammed Faheemuddin, Mustafa I. Al...