1740 search results - page 63 / 348 » Multiprocessor performance estimation using hybrid simulatio... |
151
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EMNLP
2007
15 years 5 months ago
2007
This paper proposes a framework for semi-supervised structured output learning (SOL), specifically for sequence labeling, based on a hybrid generative and discriminative approach...
127
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HPCA
2002
IEEE
16 years 4 months ago
2002
IEEE
This paper advocates that cache coherence protocols use a bandwidth adaptive approach to adjust to varied system configurations (e.g., number of processors) and workload behaviors...
135
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MEMOCODE
2008
IEEE
15 years 10 months ago
2008
IEEE
—Caches are commonly employed to hide the latency gap between memory and the CPU by exploiting locality in memory accesses. The cache performance strongly influences a system’...
113
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ISCA
2003
IEEE
15 years 9 months ago
2003
IEEE
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
130
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VTC
2006
IEEE
15 years 10 months ago
2006
IEEE
—In this paper, a novel hybrid ARQ scheme based on shift column permutation bit interleaving is proposed for OFDM systems. When a packet is requested for retransmission, we can u...