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CJ
2006
84views more  CJ 2006»
15 years 24 days ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
89
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IJFCS
2006
106views more  IJFCS 2006»
15 years 23 days ago
A Timed Failure Equivalence Preserving Abstraction for Parametric Time-interval Automata
ion for Parametric Time-Interval Automata Akio Nakata, Tadaaki Tanimoto, Suguru Sasaki, Teruo Higashino Department of Information Networking, Graduate School of Information Science...
Akio Nakata, Tadaaki Tanimoto, Suguru Sasaki, Teru...
TRIER
2002
15 years 12 days ago
Precise Interprocedural Dependence Analysis of Parallel Programs
It is known that interprocedural detection of copy constants and elimination of faint code in parallel programs are undecidable problems, if base statements are assumed to execute...
Markus Müller-Olm
BMCBI
2010
154views more  BMCBI 2010»
14 years 10 months ago
Knowledge-based matrix factorization temporally resolves the cellular responses to IL-6 stimulation
Background: External stimulations of cells by hormones, cytokines or growth factors activate signal transduction pathways that subsequently induce a re-arrangement of cellular gen...
Andreas Kowarsch, Florian Blöchl, Sebastian B...
BMCBI
2011
14 years 7 months ago
Screening synteny blocks in pairwise genome comparisons through integer programming
Background: It is difficult to accurately interpret chromosomal correspondences such as true orthology and paralogy due to significant divergence of genomes from a common ancestor...
Haibao Tang, Eric Lyons, Brent S. Pedersen, James ...