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DATE
2000
IEEE
139views Hardware» more  DATE 2000»
15 years 9 months ago
Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
ECAI
2006
Springer
15 years 8 months ago
Symmetry Breaking Using Value Precedence
We present a comprehensive study of the use of value precedence constraints to break value symmetry. We first give a simple encoding of value precedence into ternary constraints th...
Toby Walsh
COLING
1992
15 years 6 months ago
Towards Robust PATR
We report on the initial stages of development of a robust parsing system, to be used as part of The Editor's Assistant, a program that detects and corrects textual errors an...
Shona Douglas, Robert Dale
ACISICIS
2007
IEEE
15 years 11 months ago
A Hybrid Simulated Annealing with Kempe Chain Neighborhood for the University Timetabling Problem
This paper addresses the problem of finding a feasible solution for the University Course Timetabling Problem (UCTP), i.e. a solution that satisfies all the so-called hard const...
Mauritsius Tuga, Regina Berretta, Alexandre Mendes
CVPR
2005
IEEE
15 years 10 months ago
Symmetric Stereo Matching for Occlusion Handling
In this paper, we propose a symmetric stereo model to handle occlusion in dense two-frame stereo. Our occlusion reasoning is directly based on the visibility constraint that is mo...
Jian Sun, Yin Li, Sing Bing Kang