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DFT
1999
IEEE
114views VLSI» more  DFT 1999»
15 years 1 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer
CODES
1998
IEEE
15 years 1 months ago
The construction of a retargetable simulator for an architecture template
Systems in the domain of high-performance video signal processing are becoming more and more programmable. We suggest an approach to design such systems that involves measuring, v...
Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, ...
83
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DCC
1998
IEEE
15 years 1 months ago
A Locally Optimal Design Algorithm for Block-Based Multi-Hypothesis Motion-Compensated Prediction
Multi-hypothesis motion-compensated prediction extends traditional motion-compensated prediction used in video coding schemes. Known algorithms for block-based multi-hypothesis mo...
Markus Flierl, Thomas Wiegand, Bernd Girod
CODES
2004
IEEE
15 years 1 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha
ICASSP
2007
IEEE
14 years 11 months ago
Adaptive Multi-Reference Downhill Simplex Search Based on Spatial-Temporal Motion Smoothness Criterion
Multi-reference frame motion estimation improves the accuracy of motion compensation in video coding. However, it also increases computational complexity dramatically. In this pap...
Wei-Hau Pan, Chen-Kuo Chiang, Shang-Hong Lai