This paper evaluates linear models for predicting the Digital Unix five-second load average from 1 to 30 seconds into the future. A detailed statistical study of a large number of...
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leon...
Much work has been done in the areas of and–parallelism and data parallelism in Logic Programs. Such work has proceeded to a certain extent in an independent fashion. Both types...
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...