Sciweavers

5190 search results - page 920 / 1038
» Multithreaded Parallel Computer Model with Performance Evalu...
Sort
View
HPCA
2001
IEEE
15 years 10 months ago
CARS: A New Code Generation Framework for Clustered ILP Processors
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
Krishnan Kailas, Kemal Ebcioglu, Ashok K. Agrawala
CF
2009
ACM
15 years 4 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
DSN
2007
IEEE
15 years 4 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
EGH
2004
Springer
15 years 3 months ago
Realtime ray tracing of dynamic scenes on an FPGA chip
Realtime ray tracing has recently established itself as a possible alternative to the current rasterization approach for interactive 3D graphics. However, the performance of exist...
Jörg Schmittler, Sven Woop, Daniel Wagner, Wo...
ICPR
2008
IEEE
15 years 11 months ago
Evolving boundary detectors for natural images via Genetic Programming
Boundary detection constitutes a crucial step in many computer vision tasks. We present a novel learning approach to automatically construct a boundary detector for natural images...
Ilan Kadar, Moshe Sipper, Ohad Ben-Shahar