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ASPDAC
2000
ACM
159views Hardware» more  ASPDAC 2000»
15 years 9 months ago
Analytical minimization of half-perimeter wirelength
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...
Andrew A. Kennings, Igor L. Markov
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
15 years 9 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...
DATE
1999
IEEE
129views Hardware» more  DATE 1999»
15 years 9 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu
VR
1999
IEEE
154views Virtual Reality» more  VR 1999»
15 years 9 months ago
A Virtual Assembly Design Environment
The Virtual Assembly Design Environment (VADE) is a Virtual Reality (VR) based engineering application which allows engineers to evaluate, analyze, and plan the assembly of mechan...
Sankar Jayaram, Yong Wang, Uma Jayaram, Kevin W. L...
IWAI
1999
Springer
15 years 9 months ago
Listen to Your Heart Rate: Counting the Cost of Media Quality
Networked multimedia applications, such as videoconferencing, offer great communicative opportunities. Since the financial cost of using such a service increases in line with the q...
Gillian M. Wilson, Martina Angela Sasse