583 search results - page 109 / 117 » NAS Parallel Benchmark Results |
80
Voted
ISCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
HPCA
2001
IEEE
15 years 9 months ago
2001
IEEE
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
96
Voted
DSN
2007
IEEE
15 years 3 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
73
Voted
ISPASS
2007
IEEE
15 years 3 months ago
2007
IEEE
Semiconductor transient faults (i.e. soft errors) have become an increasingly important threat to microprocessor reliability. Simultaneous multithreaded (SMT) architectures exploi...