A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Abstract. In this paper we show how to compress efficiently the statespace of a concurrent system (here applied to a simple shared memory model, but this is no way limited to that ...
Abstract. In this paper we present an implementation of May Happen in Parallel analysis for Java that attempts to address some of the practical implementation concerns of the origi...
We present an optimized parallelization scheme for molecular dynamics simulations of large biomolecular systems, implemented in the production-quality molecular dynamics program N...
Robert Brunner, James C. Phillips, Laxmikant V. Ka...
The model of bulk-synchronous parallel computation (BSP) helps to implement portable general purpose algorithms while keeping predictable performance on different parallel compute...