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ISPAN
1999
IEEE
15 years 4 months ago
A Java Internet Computing Environment with Effective Configuration Method
For an effective Internet-based distributed parallel computing platform, Java-Internet Computing Environment (JICE) is designed and implemented with multithreading and remote meth...
Chun-Mok Chung, Pil-Sup Shin, Shin-Dug Kim
ICS
1995
Tsinghua U.
15 years 3 months ago
Optimum Modulo Schedules for Minimum Register Requirements
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...
Alexandre E. Eichenberger, Edward S. Davidson, San...
ANSS
2006
IEEE
15 years 6 months ago
Performance Enhancement by Eliminating Redundant Function Execution
Programs often call the same function with the same arguments, yielding the same results. We call this phenomenon, “function reuse”. Previously, we have shown such a behavior ...
Peng Chen, Krishna M. Kavi, Robert Akl
NPC
2005
Springer
15 years 5 months ago
Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
MICRO
1996
IEEE
81views Hardware» more  MICRO 1996»
15 years 4 months ago
Instruction Scheduling and Executable Editing
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
Eric Schnarr, James R. Larus