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CCGRID
2006
IEEE
15 years 6 months ago
Design and Evaluation of Nemesis, a Scalable, Low-Latency, Message-Passing Communication Subsystem
This paper presents a new low-level communication subsystem called Nemesis. Nemesis has been designed and implemented to be scalable and efficient both in the intranode communica...
Darius Buntinas, Guillaume Mercier, William Gropp
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
15 years 4 months ago
Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions
This paper aims to provide a quantitative understanding of the performance of image and video processing applications on general-purpose processors, without and with media ISA ext...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
IPPS
2006
IEEE
15 years 5 months ago
Early evaluation of the Cray XT3
Oak Ridge National Laboratory recently received delivery of a 5,294 processor Cray XT3. The XT3 is Cray’s third-generation massively parallel processing system. The system build...
Jeffrey S. Vetter, Sadaf R. Alam, Thomas H. Duniga...
EUROPAR
2005
Springer
15 years 5 months ago
Developing Java Grid Applications with Ibis
Ibis1 is a programming environment for the development of grid applications in Java. We aim to support a wide range of applications and parallel platforms, so our example programs ...
Kees van Reeuwijk, Rob van Nieuwpoort, Henri E. Ba...
IPPS
2010
IEEE
14 years 9 months ago
Prototype for a large-scale static timing analyzer running on an IBM Blue Gene
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
Akintayo Holder, Christopher D. Carothers, Kerim K...