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ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
15 years 4 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
ISCA
1999
IEEE
98views Hardware» more  ISCA 1999»
15 years 4 months ago
Multicast Snooping: A New Coherence Method Using a Multicast Address Network
This paper proposes a new coherence method called "multicast snooping" that dynamically adapts between broadcast snooping and a directory protocol. Multicast snooping is...
E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Pl...
MICRO
1999
IEEE
104views Hardware» more  MICRO 1999»
15 years 4 months ago
Control Independence in Trace Processors
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
Eric Rotenberg, James E. Smith
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
15 years 3 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
ARC
2006
Springer
124views Hardware» more  ARC 2006»
15 years 3 months ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....