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» NBTI-Aware Synthesis of Digital Circuits
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ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
15 years 2 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
15 years 2 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
DAC
2008
ACM
16 years 2 days ago
The synthesis of robust polynomial arithmetic with stochastic logic
As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challeng...
Weikang Qian, Marc D. Riedel
GECCO
2008
Springer
201views Optimization» more  GECCO 2008»
15 years 4 days ago
Advanced techniques for the creation and propagation of modules in cartesian genetic programming
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
Paul Kaufmann, Marco Platzner
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
15 years 4 months ago
A novel improvement technique for high-level test synthesis
Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iter...
Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jaha...