84 search results - page 9 / 17 » NBTI-Aware Synthesis of Digital Circuits |
CEC
2007
IEEE
15 years 27 days ago
2007
IEEE
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
ASPDAC
2010
ACM
14 years 9 months ago
2010
ACM
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...
EH
2000
IEEE
15 years 3 months ago
2000
IEEE
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
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DATE
2009
IEEE
15 years 3 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
DATE
2005
IEEE
15 years 4 months ago
2005
IEEE
This paper suggests a practical “hybrid” synthesis methodology which integrates designer-derived analytical models for system-level description with simulation-based models at...