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ISMVL
1997
IEEE
99views Hardware» more  ISMVL 1997»
15 years 4 months ago
Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits
This paper shows how the application of a CMOS ternary logic is useful in the realisation of Delay Insensitive (01)asynchronous circuits. It is shown that fully DIasynchronous cir...
Riccardo Mariani, Roberto Roncella, Roberto Salett...
WG
1998
Springer
15 years 4 months ago
Graphs with Bounded Induced Distance
In this work we introduce the class of graphs with bounded induced distance of order k, (BID(k) for short). A graph G belongs to BID(k) if the distance between any two nodes in ev...
Serafino Cicerone, Gabriele Di Stefano
146
Voted
RTAS
1997
IEEE
15 years 4 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
93
Voted
SI3D
1997
ACM
15 years 4 months ago
Post-rendering 3D warping
A pair of rendered images and their Z-buffers contain almost all of the information necessary to re-render from nearby viewpoints. For the small changes in viewpoint that occur in...
William R. Mark, Leonard McMillan, Gary Bishop
ANSS
1996
IEEE
15 years 4 months ago
Computation of the Asymptotic Bias and Variance for Simulation of Markov Reward Models
The asymptotic bias and variance are important determinants of the quality of a simulation run. In particular, the asymptotic bias can be used to approximate the bias introduced b...
Aad P. A. van Moorsel, Latha A. Kant, William H. S...
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