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VTS
2007
IEEE
203views Hardware» more  VTS 2007»
15 years 4 months ago
Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
Avijit Dutta, Nur A. Touba
CORR
2007
Springer
144views Education» more  CORR 2007»
14 years 9 months ago
Heuristics for Network Coding in Wireless Networks
Multicast is a central challenge for emerging multi-hop wireless architectures such as wireless mesh networks, because of its substantial cost in terms of bandwidth. In this artic...
Song Yean Cho, Cedric Adjih, Philippe Jacquet
ICMCS
2006
IEEE
129views Multimedia» more  ICMCS 2006»
15 years 3 months ago
Directional Discrete Cosine Transforms for Image Coding
- Nearly all block-based transform schemes for image and video coding developed so far choose the 2-D discrete cosine transform (DCT) of a square block shape. With almost no except...
Bing Zeng, Jingjing Fu
ICSE
2011
IEEE-ACM
14 years 1 months ago
A lightweight code analysis and its role in evaluation of a dependability case
A dependability case is an explicit, end-to-end argument, based on concrete evidence, that a system satisfies a critical property. We report on a case study constructing a depend...
Joseph P. Near, Aleksandar Milicevic, Eunsuk Kang,...
DSN
2002
IEEE
15 years 2 months ago
32-Bit Cyclic Redundancy Codes for Internet Applications
Standardized 32-bit Cyclic Redundancy Codes provide fewer bits of guaranteed error detection than they could, achieving a Hamming Distance (HD) of only 4 for maximum-length Ethern...
Philip Koopman