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PLDI
2006
ACM
15 years 3 months ago
Termination proofs for systems code
Program termination is central to the process of ensuring that systems code can always react. We describe a new program termination prover that performs a path-sensitive and conte...
Byron Cook, Andreas Podelski, Andrey Rybalchenko
ATVA
2005
Springer
132views Hardware» more  ATVA 2005»
15 years 3 months ago
Flat Counter Automata Almost Everywhere!
Abstract. This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be ...
Jérôme Leroux, Grégoire Sutre
ICS
2005
Tsinghua U.
15 years 3 months ago
Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...
Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin ...
ISHPC
2003
Springer
15 years 2 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
ICDE
2010
IEEE
206views Database» more  ICDE 2010»
15 years 2 months ago
Evaluating skylines in the presence of equijoins
— When a database system is extended with the skyline operator, it is important to determine the most efficient way to execute a skyline query across tables with join operations...
Wen Jin, Michael D. Morse, Jignesh M. Patel, Marti...