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EUROPAR
2010
Springer
15 years 3 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
HPCA
2002
IEEE
16 years 3 months ago
CableS: Thread Control and Memory Management Extensions for Shared Virtual Memory Clusters
Clusters of high-end workstations and PCs are currently used in many application domains to perform large-scale computations or as scalable servers for I/O bound tasks. Although c...
Peter Jamieson, Angelos Bilas
ICSE
2010
IEEE-ACM
15 years 5 months ago
Supporting developers with natural language queries
The feature list of modern IDEs is steadily growing and mastering these tools becomes more and more demanding, especially for novice programmers. Despite their remarkable capabili...
Michael Würsch, Giacomo Ghezzi, Gerald Reif, ...
FCCM
2009
IEEE
148views VLSI» more  FCCM 2009»
15 years 9 months ago
A Packet Generator on the NetFPGA Platform
— A packet generator and network traffic capture system has been implemented on the NetFPGA. The NetFPGA is an open networking platform accelerator that enables rapid developmen...
G. Adam Covington, Glen Gibb, John W. Lockwood, Ni...
VLDB
1994
ACM
84views Database» more  VLDB 1994»
15 years 7 months ago
A Transaction Replication Scheme for a Replicated Database with Node Autonomy
Many proposed protocols for replicated databases consider centralized control of each transaction so that given a transaction, some site will monitor the remote data access and tr...
Ada Wai-Chee Fu, David Wai-Lok Cheung