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» Networked control systems with packet delays and losses
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ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
13 years 6 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
TECS
2008
122views more  TECS 2008»
13 years 6 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer
COOPIS
2002
IEEE
13 years 11 months ago
Composing and Deploying Grid Middleware Web Services Using Model Driven Architecture
Rapid advances in networking, hardware, and middleware technologies are facilitating the development and deployment of complex grid applications, such as large-scale distributed co...
Aniruddha S. Gokhale, Balachandran Natarajan
AICT
2009
IEEE
226views Communications» more  AICT 2009»
14 years 1 months ago
Optimizing MBMS Power Allocation through HSDPA Transmissions
— Multimedia Broadcast Multicast Service (MBMS) epitomizes the increasing popularity of enhanced end-user experience in Universal Mobile Telecommunications System (UMTS), since i...
Antonios G. Alexiou, Christos Bouras, Evangelos Re...
CCS
2008
ACM
13 years 8 months ago
Code injection attacks on harvard-architecture devices
Harvard architecture CPU design is common in the embedded world. Examples of Harvard-based architecture devices are the Mica family of wireless sensors. Mica motes have limited me...
Aurélien Francillon, Claude Castelluccia