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DAC
2009
ACM
15 years 10 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
BIRTHDAY
2006
Springer
15 years 7 months ago
Optimal Flow Distribution Among Multiple Channels with Unknown Capacities
Consider a simple network flow problem in which there are n channels directed from a source to a sink. The channel capacities are unknown and we wish to determine a feasible netwo...
Richard M. Karp, Till Nierhoff, Till Tantau
IJIT
2004
15 years 5 months ago
An HCI Template for Distributed Applications
Both software applications and their development environment are becoming more and more distributed. This trend impacts not only the way software computes, but also how it looks. T...
Xizhi Li
EWSN
2007
Springer
16 years 3 months ago
Model-Based Design Exploration of Wireless Sensor Node Lifetimes
This paper presents two lifetime models that describe two of the most common modes of operation of sensor nodes today, triggerdriven and duty-cycle driven. The models use a set of ...
Deokwoo Jung, Thiago Teixeira, Andrew Barton-Sween...
118
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MOBISYS
2005
ACM
16 years 3 months ago
Cracking the Bluetooth PIN
This paper describes the implementation of an attack on the Bluetooth security mechanism. Specifically, we describe a passive attack, in which an attacker can find the PIN used du...
Yaniv Shaked, Avishai Wool