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CIMCA
2005
IEEE
15 years 9 months ago
An Accelerating Learning Algorithm for Block-Diagonal Recurrent Neural Networks
An efficient training method for block-diagonal recurrent neural networks is proposed. The method modifies the RPROP algorithm, originally developed for static models, in order to...
Paris A. Mastorocostas, Dimitris N. Varsamis, Cons...
FPL
2003
Springer
144views Hardware» more  FPL 2003»
15 years 9 months ago
FPGA Implementations of Neural Networks - A Survey of a Decade of Progress
The first successful FPGA implementation [1] of artificial neural networks (ANNs) was published a little over a decade ago. It is timely to review the progress that has been made i...
Jihan Zhu, Peter Sutton
ESANN
2008
15 years 5 months ago
Neural network hardware architecture for pattern recognition in the HESS2 project
In this paper, we consider the problem of implementation of neural network in the context of the level 2 trigger of HESS2 project. We propose a hardware architecture which which ta...
Narayanan Ramanan, Sonia Khatchadourian, Jean-Chri...
ESANN
2008
15 years 5 months ago
A multiple testing procedure for input variable selection in neural networks
In this paper a novel procedure to select the input nodes in neural network modeling is presented and discussed. The approach is developed in a multiple testing framework and so it...
Michele La Rocca, Cira Perna
108
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ESANN
2008
15 years 5 months ago
Computational model for amygdala neural networks
We present a computational model of amygdala neural networks. It is used to simulate neuronal activation in amygdala nuclei at different stages of aversive conditioning experiments...
Jean Marc Salotti