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CC
2010
Springer
190views System Software» more  CC 2010»
15 years 8 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
LCTRTS
2009
Springer
15 years 8 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
15 years 8 months ago
ECMon: exposing cache events for monitoring
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
Vijay Nagarajan, Rajiv Gupta
LICS
2009
IEEE
15 years 8 months ago
The Structure of First-Order Causality
Game semantics describe the interactive behavior of proofs by interpreting formulas as games on which proofs induce strategies. Such a semantics is introduced here for capturing d...
Samuel Mimram
OOPSLA
2007
Springer
15 years 7 months ago
Modular typestate checking of aliased objects
Objects often define usage protocols that clients must follow in order for these objects to work properly. Aliasing makes it notoriously difficult to check whether clients and i...
Kevin Bierhoff, Jonathan Aldrich
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