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ITC
1993
IEEE
148views Hardware» more  ITC 1993»
15 years 5 months ago
DELTEST: Deterministic Test Generation for Gate-Delay Faults
This paper presents an efficient approach to generate tests for gate delay faults. Unlike other known algorithms which try to generate a 'good' delay test the presented ...
Udo Mahlstedt
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 5 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
FORMATS
2009
Springer
15 years 5 months ago
Safe Runtime Verification of Real-Time Properties
Abstract. Introducing a monitor on a system typically changes the system's behaviour by slowing the system down and increasing memory consumption. This may possibly result in ...
Christian Colombo, Gordon J. Pace, Gerardo Schneid...
GLOBECOM
2009
IEEE
15 years 5 months ago
Multi-Path Key Establishment against REM Attacks in Wireless Ad Hoc Networks
Secure communications in wireless ad hoc networks require setting up end-to-end secret keys for communicating node pairs. Due to physical limitations and scalability requirements, ...
Tian Lan, Ruby B. Lee, Mung Chiang
CC
2006
Springer
108views System Software» more  CC 2006»
15 years 5 months ago
Efficient Flow-Sensitive Interprocedural Data-Flow Analysis in the Presence of Pointers
This paper presents a new worklist algorithm that significantly speeds up a large class of flow-sensitive data-flow analyses, including typestate error checking and pointer analysi...
Teck Bok Tok, Samuel Z. Guyer, Calvin Lin