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CODES
2010
IEEE
14 years 7 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ENTCS
2007
168views more  ENTCS 2007»
14 years 9 months ago
Bytecode Rewriting in Tom
In this paper, we present a term rewriting based library for manipulating Java bytecode. We define a mapping from bytecode programs to algebraic terms, and we use Tom, an extensi...
Emilie Balland, Pierre-Etienne Moreau, Antoine Rei...
EDOC
2004
IEEE
15 years 1 months ago
A Logical Viewpoint on Architectures
In this paper we introduce a logical viewpoint on architectures. The logical viewpoint is based on the distinction between symbolic and semantic models of architectures. The core ...
Frank S. de Boer, Marcello M. Bonsangue, Joost Jac...
LREC
2010
167views Education» more  LREC 2010»
14 years 11 months ago
FrameNet Translation Using Bilingual Dictionaries with Evaluation on the English-French Pair
Semantic Role Labeling cannot be performed without an associated linguistic resource. A key resource for such a task is the FrameNet resource based on Fillmore's theory of fr...
Claire Mouton, Gaël de Chalendar, Benoî...
ICS
2005
Tsinghua U.
15 years 3 months ago
Disk layout optimization for reducing energy consumption
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir