Sciweavers

959 search results - page 104 / 192
» New Techniques for Algorithm Portfolio Design
Sort
View
FPGA
2010
ACM
250views FPGA» more  FPGA 2010»
16 years 28 days ago
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
Gregory Lucas, Chen Dong, Deming Chen
DAC
2003
ACM
15 years 9 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich
VRST
2004
ACM
15 years 9 months ago
Modeling and rendering of walkthrough environments with panoramic images
An important, potential application of image-based techniques is to create photo-realistic image-based environments for interactive walkthrough. However, existing image-based stud...
Angus M. K. Siu, Ada S. K. Wan, Rynson W. H. Lau
IPPS
2002
IEEE
15 years 9 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 9 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha