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ASPDAC
2007
ACM
152views Hardware» more  ASPDAC 2007»
15 years 3 months ago
A Graph Reduction Approach to Symbolic Circuit Analysis
A new graph reduction approach to symbolic circuit analysis is developed in this paper. A Binary Decision Diagram (BDD) mechanism is formulated, together with a specially designed ...
Guoyong Shi, Weiwei Chen, C.-J. Richard Shi
HVC
2005
Springer
160views Hardware» more  HVC 2005»
15 years 5 months ago
Simultaneous SAT-Based Model Checking of Safety Properties
We present several algorithms for simultaneous SAT (propositional satisfiability) based model checking of safety properties. More precisely, we focus on Bounded Model Checking and ...
Zurab Khasidashvili, Alexander Nadel, Amit Palti, ...
CIDM
2007
IEEE
15 years 1 days ago
Detection of Unknown Computer Worms Activity Based on Computer Behavior using Data Mining
— Detecting unknown worms is a challenging task. Extant solutions, such as anti-virus tools, rely mainly on prior explicit knowledge of specific worm signatures. As a result, aft...
Robert Moskovitch, Ido Gus, Shay Pluderman, Dima S...
DAC
2008
ACM
16 years 26 days ago
Scan chain clustering for test power reduction
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
ILP
2004
Springer
15 years 5 months ago
Macro-Operators Revisited in Inductive Logic Programming
For the last ten years a lot of work has been devoted to propositionalization techniques in relational learning. These techniques change the representation of relational problems t...
Érick Alphonse