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» New algorithms for efficient parallel string comparison
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IPPS
2006
IEEE
15 years 5 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...
ICISC
2004
120views Cryptology» more  ICISC 2004»
15 years 1 months ago
Efficient Computation of Tate Pairing in Projective Coordinate over General Characteristic Fields
Abstract. We consider the use of Jacobian coordinates for Tate pairing over general characteristics. The idea of encapsulated double-andline computation and add-and-line computatio...
Sanjit Chatterjee, Palash Sarkar, Rana Barua
SIPS
2007
IEEE
15 years 6 months ago
An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
JMLR
2008
148views more  JMLR 2008»
14 years 11 months ago
Linear-Time Computation of Similarity Measures for Sequential Data
Efficient and expressive comparison of sequences is an essential procedure for learning with sequential data. In this article we propose a generic framework for computation of sim...
Konrad Rieck, Pavel Laskov
APCSAC
2000
IEEE
15 years 4 months ago
Micro-Threading: A New Approach to Future RISC
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
Chris R. Jesshope, Bing Luo