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» New directions for the AAFID architecture
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FPL
2009
Springer
107views Hardware» more  FPL 2009»
15 years 2 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
INFORMATICALT
2007
171views more  INFORMATICALT 2007»
14 years 9 months ago
E-Learning Documentation of Historical Living Systems with 3-D Modeling Functionality
The innovations and improvements in digital imaging sensors and scanners, computer modeling, haptic equipments and e-learning technology, as well as the availability of many powerf...
Athanasios D. Styliadis
SOSP
2003
ACM
15 years 6 months ago
Improving the reliability of commodity operating systems
Despite decades of research in extensible operating system technology, extensions such as device drivers remain a significant cause of system failures. In Windows XP, for example,...
Michael M. Swift, Brian N. Bershad, Henry M. Levy
CC
2010
Springer
190views System Software» more  CC 2010»
15 years 4 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
TPHOL
2009
IEEE
15 years 4 months ago
A Better x86 Memory Model: x86-TSO
Abstract. Real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory mode...
Scott Owens, Susmit Sarkar, Peter Sewell