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PDCAT
2007
Springer
15 years 3 months ago
A Distributed Virtual Machine for Parallel Graph Reduction
We present the architecture of nreduce, a distributed virtual machine which uses parallel graph reduction to run programs across a set of computers. It executes code written in a ...
Peter M. Kelly, Paul D. Coddington, Andrew L. Wend...
LCTRTS
2007
Springer
15 years 3 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
ASPLOS
2009
ACM
15 years 10 months ago
Commutativity analysis for software parallelization: letting program transformations see the big picture
Extracting performance from many-core architectures requires software engineers to create multi-threaded applications, which significantly complicates the already daunting task of...
Farhana Aleen, Nathan Clark
CODES
2010
IEEE
14 years 7 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
LCPC
1995
Springer
15 years 1 months ago
Demand-Driven, Symbolic Range Propagation
Abstract. To e ectively parallelize real programs, parallelizing compilers need powerful symbolic analysis techniques 13, 6]. In previous work we have introduced an algorithm calle...
William Blume, Rudolf Eigenmann