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CF
2009
ACM
15 years 4 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
EUROPAR
2007
Springer
15 years 3 months ago
Esodyp+: Prefetching in the Jackal Software DSM
Abstract. Prefetching transfers a data item in advance from its storage location to its usage location so that communication is hidden and does not delay computation. We present a ...
Michael Klemm, Jean Christophe Beyler, Ronny T. La...
88
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ATAL
2006
Springer
15 years 1 months ago
ActorNet: an actor platform for wireless sensor networks
We present actorNet, a mobile agent platform for wireless sensor networks (WSNs). WSNs are well-suited to multiagent systems: agent autonomy reduces the need for communication, sa...
YoungMin Kwon, Sameer Sundresh, Kirill Mechitov, G...
ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
14 years 9 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
LCTRTS
2007
Springer
15 years 3 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...