357 search results - page 11 / 72 » No new wires |
79
Voted
NIPS
2000
15 years 1 months ago
2000
We introduce total wire length as salient complexity measure for an analysis of the circuit complexity of sensory processing in biological neural systems and neuromorphic engineer...
ASPDAC
2009
ACM
15 years 6 months ago
2009
ACM
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines is pr...
100
Voted
ISPD
2003
ACM
15 years 5 months ago
2003
ACM
Floorplanning individual pipelined array modules of a larger overall die can yield beneficial results. Critical paths in every pipeline stage of a pipelined design are roughly equ...
87
Voted
MEMOCODE
2007
IEEE
15 years 6 months ago
2007
IEEE
—With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to System-on-Chip desig...
91
Voted
ISQED
2005
IEEE
15 years 6 months ago
2005
IEEE
Abstract— To achieve small delay and low crosstalk for multiple signal nets with capacitive and inductive coupling, we propose in this paper a novel interconnect structure, stagg...