357 search results - page 23 / 72 » No new wires |
144
click to vote
FPGA
2000
ACM
15 years 5 months ago
2000
ACM
A method for evaluating and constructing sparse crossbars which are both area efficient and highly routable is presented. The evaluation method uses a network flow algorithm to ac...
130
click to vote
TCAD
2002
15 years 1 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
111
click to vote
ISPD
2005
ACM
15 years 7 months ago
2005
ACM
In the nanometer VLSI technology, the variation effects like manufacturing variation, power supply noise, temperature etc. become very significant. As one of the most vital nets...
100
click to vote
ASYNC
2002
IEEE
15 years 7 months ago
2002
IEEE
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
133
click to vote
DAC
1998
ACM
15 years 6 months ago
1998
ACM
—Due to the scaling down of device geometry and increasing of frequency in deep submicron designs, crosstalk between interconnection wires has become an important issue in very l...