357 search results - page 37 / 72 » No new wires |
107
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ICCAD
2006
IEEE
15 years 9 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
118
Voted
JGAA
2006
15 years 13 days ago
2006
Visualization of circuits is an important research area in electronic design automation. One commonly accepted method to visualize a circuit aligns the gates to layers and uses or...
101
Voted
ICCAD
2004
IEEE
15 years 9 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
84
Voted
ASPDAC
2012
ACM
13 years 8 months ago
2012
ACM
—The 3D IC integration using through-silicon-vias (TSV) has gained tremendous momentum recently for industry adoption. However, as TSV involves disruptive manufacturing technolog...
109
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HPCA
2009
IEEE
16 years 1 months ago
2009
IEEE
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...