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ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
15 years 9 months ago
A network-flow approach to timing-driven incremental placement for ASICs
We present a novel incremental placement methodology called FlowPlace for significantly reducing critical path delays of placed standard-cell circuits. FlowPlace includes: a) a t...
Shantanu Dutt, Huan Ren, Fenghua Yuan, Vishal Suth...
128
Voted
SAMOS
2009
Springer
15 years 6 months ago
Multiple Description Scalable Coding for Video Transmission over Unreliable Networks
Developing real time multimedia applications for best effort networks such as the Internet requires prohibitions against jitter delay and frame loss. This problem is further compl...
Roya Choupani, Stephan Wong, Mehmet R. Tolun
HOTI
2008
IEEE
15 years 6 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
129
Voted
LCN
2008
IEEE
15 years 6 months ago
WBest: A bandwidth estimation tool for IEEE 802.11 wireless networks
—Bandwidth estimation techniques seek to provide an accurate estimation of available bandwidth such that network applications can adjust their behavior accordingly. However, most...
Mingzhe Li, Mark Claypool, Robert E. Kinicki
CCECE
2006
IEEE
15 years 6 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya