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MICRO
2006
IEEE
103views Hardware» more  MICRO 2006»
15 years 3 months ago
NoSQ: Store-Load Communication without a Store Queue
This paper presents NoSQ (short for No Store Queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the outof-ord...
Tingting Sha, Milo M. K. Martin, Amir Roth
EURONGI
2006
Springer
15 years 1 months ago
Job Scheduling for Maximal Throughput in Autonomic Computing Systems
Abstract. Autonomic computing networks manage multiple tasks over a distributed network of resources. In this paper, we view an autonomic computing system as a network of queues, w...
Kevin Ross, Nicholas Bambos
HPCA
2000
IEEE
15 years 2 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
CIDR
2003
164views Algorithms» more  CIDR 2003»
14 years 11 months ago
Capacity Bound-free Web Warehouse
Web cache technologies have been developed as an extension of CPU cache, by modifying LRU (Least Recently Used) algorithms. Actually in web cache systems, we can use disks and ter...
Yahiko Kambayashi, Kai Cheng
HPCA
2007
IEEE
15 years 10 months ago
Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
Kiran Puttaswamy, Gabriel H. Loh