325 search results - page 32 / 65 » Non-uniform Instruction Scheduling |
97
Voted
VLSID
2005
IEEE
16 years 27 days ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
IEEEPACT
1999
IEEE
15 years 4 months ago
1999
IEEE
An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...
134
Voted
ASPLOS
2004
ACM
15 years 6 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
ISCA
1995
IEEE
15 years 4 months ago
1995
IEEE
Speculative execution is execution of instructions before it is known whether these instructions should be executed. Compiler-based speculative execution has the potential to achi...
IISWC
2008
IEEE
15 years 7 months ago
2008
IEEE
Heterogeneous multi-core processors are attractive for power efficient computing because of their ability to meet varied resource requirements of diverse applications in a workloa...