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ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
15 years 6 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
IPPS
2002
IEEE
15 years 5 months ago
Hierarchical Interconnects for On-Chip Clustering
In the sub-micron technology era, wire delays are becoming much more important than gate delays, making it particularly attractive to go for clustered designs. A common form of cl...
Aneesh Aggarwal, Manoj Franklin
ADAEUROPE
2010
Springer
15 years 5 months ago
What to Make of Multicore Processors for Reliable Real-Time Systems?
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...
Theodore P. Baker
CODES
2001
IEEE
15 years 4 months ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
94
Voted
IPPS
2010
IEEE
14 years 10 months ago
Solving the advection PDE on the cell broadband engine
In this paper we present the venture of porting two different algorithms for solving the two-dimensional advection PDE on the CBE platform, an in-place and an outof-place one, and ...
Georgios Rokos, Gerassimos Peteinatos, Georgia Kou...