325 search results - page 42 / 65 » Non-uniform Instruction Scheduling |
105
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ISWC
1997
IEEE
15 years 4 months ago
1997
IEEE
Metronaut is a novel wearable computer which captures information, senses position, provides wide range communications, consumes less than one watt of power, and weighs less than ...
103
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MICRO
1991
IEEE
15 years 4 months ago
1991
IEEE
- We present techniques for exploiting parallelism extracted from loops on an MIMD system. Parallelism is exploited through parallel execution of instructions on multiple processor...
109
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EUROPAR
2008
Springer
15 years 2 months ago
2008
Springer
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
102
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SIPS
2007
IEEE
15 years 6 months ago
2007
IEEE
In this paper, we investigate the efficient software implementations of the Montgomery modular multiplication algorithm on a multi-core system. A HW/SW co-design technique is use...
118
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ICS
2001
Tsinghua U.
15 years 5 months ago
2001
Tsinghua U.
The issue logic of dynamically scheduled superscalar processors is one of their most complex and power-consuming parts. In this paper we present alternative issue-logic designs th...