325 search results - page 47 / 65 » Non-uniform Instruction Scheduling |
107
Voted
HPCA
2008
IEEE
16 years 25 days ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
105
Voted
IPPS
2005
IEEE
15 years 6 months ago
2005
IEEE
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
102
Voted
MICRO
2005
IEEE
15 years 6 months ago
2005
IEEE
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...
91
Voted
CC
2004
Springer
15 years 5 months ago
2004
Springer
Abstract. This paper presents the design, implementation and experimental evaluation of a practical region-based partial dead code elimination (PDE) algorithm on predicated code in...
115
Voted
DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...