325 search results - page 8 / 65 » Non-uniform Instruction Scheduling |
IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
111
Voted
ICPPW
2006
IEEE
15 years 6 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
115
Voted
EUROPAR
2008
Springer
15 years 2 months ago
2008
Springer
Over the last decade, Message Passing Interface (MPI) has become a very successful parallel programming environment for distributed memory architectures such as clusters. However, ...
107
Voted
ICCAD
1994
IEEE
15 years 4 months ago
1994
IEEE
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
106
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IEEEPACT
2002
IEEE
15 years 5 months ago
2002
IEEE
Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines ...