7 search results - page 2 / 2 » Non-uniform power access in large caches with low-swing wire... |
MICRO
2007
IEEE
15 years 3 months ago
2007
IEEE
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...