Sciweavers

204 search results - page 18 / 41
» Nonuniform Banking for Reducing Memory Energy Consumption
Sort
View
ICCD
2001
IEEE
84views Hardware» more  ICCD 2001»
15 years 6 months ago
Static Energy Reduction Techniques for Microprocessor Caches
Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of increased static energy consumption ...
Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, S...
ICNP
2009
IEEE
14 years 7 months ago
Memory Efficient Protocols for Detecting Node Replication Attacks in Wireless Sensor Networks
Sensor networks deployed in hostile areas are subject to node replication attacks, in which an adversary compromises a few sensors, extracts the security keys, and clones them in a...
Ming Zhang, Vishal Khanapure, Shigang Chen, Xuelia...
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 6 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 2 months ago
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
Luca Benini, Davide Bruni, Alberto Macii, Enrico M...
SAMOS
2007
Springer
15 years 3 months ago
A Study of Energy Saving in Customizable Processors
Abstract. Embedded systems are special purpose systems which perform predefined tasks with very specific requirements like high performance, low volume or low power. Most of the ...
Paolo Bonzini, Dilek Harmanci, Laura Pozzi