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» Nonuniform Banking for Reducing Memory Energy Consumption
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ASPLOS
2000
ACM
15 years 2 months ago
Power Aware Page Allocation
One of the major challenges of post-PC computing is the need to reduce energy consumption, thereby extending the lifetime of the batteries that power these mobile devices. Memory ...
Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, Carla Schl...
CASES
2006
ACM
15 years 3 months ago
A dynamic code placement technique for scratchpad memory using postpass optimization
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung...
MICRO
2006
IEEE
71views Hardware» more  MICRO 2006»
14 years 9 months ago
Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance
Runahead execution improves memory latency tolerance without significantly increasing processor complexity. Unfortunately, a runahead execution processor executes significantly mo...
Onur Mutlu, Hyesoon Kim, Yale N. Patt
ASPLOS
2011
ACM
14 years 1 months ago
MemScale: active low-power modes for main memory
Main memory is responsible for a large and increasing fraction of the energy consumed by servers. Prior work has focused on exploiting DRAM low-power states to conserve energy. Ho...
Qingyuan Deng, David Meisner, Luiz E. Ramos, Thoma...
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HPCA
2002
IEEE
15 years 10 months ago
Power Issues Related to Branch Prediction
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco B...