204 search results - page 28 / 41 » Nonuniform Banking for Reducing Memory Energy Consumption |
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
DAC
2009
ACM
15 years 10 months ago
2009
ACM
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
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Voted
HPCA
2008
IEEE
15 years 10 months ago
2008
IEEE
Power consumption within the disk-based storage subsystem forms a substantial portion of the overall energy footprint in commodity systems. Researchers have proposed external cach...
SBACPAD
2005
IEEE
15 years 3 months ago
2005
IEEE
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...