204 search results - page 32 / 41 » Nonuniform Banking for Reducing Memory Energy Consumption |
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
The load/store queue (LSQ) is one of the most complex parts of contemporary processors. Its latency is critical for the processor performance and it is usually one of the processo...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
EMSOFT
2006
Springer
15 years 1 months ago
2006
Springer
While hard disk drives are the most common secondary storage devices, their high power consumption and low shockresistance limit them as an ideal mobile storage solution. On the o...
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—In this paper a programmable Forward Error Correction (FEC) IP for a DVB-S2 receiver is presented. It is composed of a Low-Density Parity Check (LDPC), a Bose-ChaudhuriH...