204 search results - page 6 / 41 » Nonuniform Banking for Reducing Memory Energy Consumption |
CODES
2001
IEEE
15 years 1 months ago
2001
IEEE
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
79
Voted
ICS
2005
Tsinghua U.
15 years 3 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
LCTRTS
2007
Springer
15 years 3 months ago
2007
Springer
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for applicationspecific systems, called VAbM technique. It targets th...