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» Nonuniform Banking for Reducing Memory Energy Consumption
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LCTRTS
2010
Springer
15 years 4 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
15 years 4 months ago
A power-efficient migration mechanism for D-NUCA caches
D-NUCA L2 caches are able to tolerate the increasing wire delay effects due to technology scaling thanks to their banked organization, broadcast line search and data promotion/dem...
Alessandro Bardine, Manuel Comparetti, Pierfrances...
TC
2011
14 years 4 months ago
Energy Reduction in Consolidated Servers through Memory-Aware Virtual Machine Scheduling
—Increasing energy consumption in server consolidation environments leads to high maintenance costs for data centers. Main memory, no less than processor, is a major energy consu...
Jae-Wan Jang, Myeongjae Jeon, Hyo-Sil Kim, Heeseun...
ICCD
2003
IEEE
129views Hardware» more  ICCD 2003»
15 years 6 months ago
Reducing dTLB Energy Through Dynamic Resizing
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant ...
Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubr...
ICCAD
2003
IEEE
131views Hardware» more  ICCAD 2003»
15 years 6 months ago
LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches
Leakage energy will be the major energy consumer in future deep sub-micron designs. Especially the memory sub-system of future SOCs will be negatively affected by this trend. In o...
Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel